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TC682
Inverting Voltage Doubler
Features:
* 99.9% Voltage Conversion Efficiency * 92% Power Conversion Efficiency * Wide Input Voltage Range: - +2.4V to +5.5V * Only 3 External Capacitors Required * 185 A Supply Current * Space-Saving 8-Pin SOIC and 8-Pin PDIP Packages
General Description:
The TC682 is a CMOS charge pump converter that provides an inverted doubled output from a single positive supply. An on-board 12 kHz (typical) oscillator provides the clock and only 3 external capacitors are required for full circuit implementation. Low output source impedance (typically 140), provides output current up to 10 mA. The TC682 features low quiescent current and high efficiency, making it the ideal choice for a wide variety of applications that require a negative voltage derived from a single positive supply (for example: generation of -6V from a 3V lithium cell or -10V generated from a +5V logic supply). The minimum external parts count and small physical size of the TC682 make it useful in many mediumcurrent, dual voltage analog power supplies.
Applications:
* * * * * * * -10V from +5V Logic Supply -6V from a Single 3V Lithium Cell Portable Handheld Instruments Cellular Phones LCD Display Bias Generator Panel Meters Operational Amplifier Power Supplies
Functional Block Diagram
VIN +2.4V < VIN < +5.5V
Device Selection Table
Part Number TC682COA TC682CPA TC682EOA TC682EPA Package 8-Pin SOIC 8-Pin PDIP 8-Pin SOIC 8-Pin PDIP Operating Temp. Range 0C to +70C 0C to +70C -40C to +85C -40C to +85C
VIN C1 + - C 1+ C 1-
TC682
C2 + - C 2+ C 2- VOUT GND + GND All Caps = 3.3 F VOUT = -(2 x VIN ) VOUT COUT
Package Type
8-Pin PDIP
C1- 1 C2+ 2 C2- 3 VOUT 4 TC682CPA TC682EPA 8 7 6 5 NC C 1+ VIN GND C 1- C 2+ C 2- VOUT 1 2 3 4 TC682COA TC682EOA
8-Pin SOIC
8 7 6 5 NC C1+ VIN GND
(c) 2006 Microchip Technology Inc.
DS21453C-page 1
TC682
1.0 ELECTRICAL CHARACTERISTICS
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings*
VIN .......................................................................+5.8V VIN dV/dT ........................................................ 1V/sec VOUT ...................................................................-11.6V Short-Circuit Duration - VOUT ..................... Continuous Power Dissipation (TA 70C) 8-Pin PDIP ..............................................730 mW 8-Pin SOIC ..............................................470 mW Operating Temperature Range.............-40C to +85C Storage Temperature (Unbiased) .......-65C to +150C
TC682 ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Over operating temperature range, VIN = +5V, test circuit Figure 3-1 unless otherwise noted. Symbol VIN IIN ROUT Parameter Supply Voltage Range Supply Current VOUT Source Resistance Min 2.4 -- -- -- -- -- 90 99 Typ -- 185 -- 140 -- 170 12 92 99.9 Max 5.5 300 400 180 230 320 -- -- -- Units V A Test Conditions RL = 2 k RL = , TA = 25C RL = IL- = 10 mA, TA = 25C IL- = 10 mA IL- = 5 mA, VIN = 2.8V RL = 2 k, TA = 25C VOUT, RL =
FOSC PEFF VOUTEFF
Oscillator Frequency Power Efficiency Voltage Conversion Efficiency
kHz % %
DS21453C-page 2
(c) 2006 Microchip Technology Inc.
TC682
2.0 PIN DESCRIPTION
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Pin No. (8-Pin PDIP, SOIC) 1 2 3 4 5 6 7 8
PIN FUNCTION TABLE
Symbol C1- C2+ C2- VOUT GND VIN C1+ NC Description Input. Capacitor C1 negative terminal. Input. Capacitor C2 positive terminal. Input. Capacitor C2 negative terminal. Output. Negative output voltage (-2VIN). Input. Ground. Input. Power supply voltage. Input. Capacitor C1 positive terminal. No connection.
(c) 2006 Microchip Technology Inc.
DS21453C-page 3
TC682
3.0
VIN (+5V) + - 7 1 2 3 C 1+ C 1-
DETAILED DESCRIPTION
+5V
6 VIN
SW1 + - C1 SW2
V-OUT - + COUT RL
SW3 + - SW4 -10V VOUT C2 - + C3
C1
TC682
C 2+ C 2- 5 VOUT 4 GND
C2
+ -
FIGURE 3-3:
Charge Pump - Phase 2
GND All Caps = 3.3 F
3.3
Maximum Operating Limits
FIGURE 3-1:
TC682 Test Circuit
3.1
Phase 1
VSS charge storage - before this phase of the clock cycle, capacitor C1 is already charged to +5V. C1+ is then switched to ground and the charge in C1- is transferred to C2-. Since C2+ is at +5V, the voltage potential across capacitor C2 is now -10V.
VIN = +5V
The TC682 has on-chip Zener diodes that clamp VIN to approximately 5.8V, and VOUT to -11.6V. Never exceed the maximum supply voltage or excessive current will be shunted by these diodes, potentially damaging the chip. The TC682 will operate over the entire operating temperature range with an input voltage of 2V to 5.5V.
3.4
Efficiency Considerations
Theoretically a charge pump voltage multiplier can approach 100% efficiency under the following conditions: * The charge pump switches have virtually no offset and are extremely low on resistance. * Minimal power is consumed by the drive circuitry. * The impedances of the reservoir and pump capacitors are negligible. For the TC682, efficiency is as shown below: Voltage Efficiency = VOUT / (-2VIN) VOUT = -2VIN + VDROP VDROP = (IOUT) (ROUT) Power Loss = IOUT (VDROP) There will be a substantial voltage difference between VOUT and -2VIN if the impedances of the pump capacitors C1 and C2 are high with respect to their respective output loads. Larger values of reservoir capacitor C3 will reduce output ripple. Larger values of both pump and reservoir capacitors improve the efficiency. See Section 4.2 "Capacitor Selection" "Capacitor Selection".
SW1 + - + C1 SW2 -5V -
SW3 C2 SW4 - +
VOUT C3
FIGURE 3-2:
Charge Pump - Phase 1
3.2
Phase 2
VSS transfer - phase two of the clock connects the negative terminal of C2 to the negative side of reservoir capacitor C3 and the positive terminal of C2 to ground, transferring the generated -10V to C3. Simultaneously, the positive side of capacitor C1 is switched to +5V and the negative side is connected to ground. C2 is then switched to VCC and GND and Phase 1 begins again.
DS21453C-page 4
(c) 2006 Microchip Technology Inc.
TC682
4.0
4.1
TYPICAL APPLICATIONS
Negative Doubling Converter
Output voltage ripple is affected by C3. Typically the larger the value of C3 the less the ripple for a given load current. The formula for P-P VRIPPLE is given below: VRIPPLE = {1/[2(fPUMP x C3)] + 2(ESRC3)} (IOUT) For a 10 F (0.5 ESR) capacitor for C3, fPUMP = 10 kHz and IOUT = 10 mA the peak-to-peak ripple voltage at the output will be less then 60 mV. In most applications (IOUT < = 10 mA) a 10-20 F capacitor and 1-5 F pump capacitors will suffice. Table 4-2 shows VRIPPLE for different values of C3 (assume 1 ESR).
The most common application of the TC682 is as a charge pump voltage converter which provides a negative output of two times a positive input voltage (Figure 4-1).
+ C1 22 F 1 C 1- C1+ 7
TABLE 4-1:
TC682
6 5 GND + C3 22 F V-OUT
C2
+
2 C+ 2 22 F 3 C- 2 4 V-OUT
OUTPUT RESISTANCE VS. C1, C2
ROUT() 4085 2084 510 285 145 125 105 94 87
VIN GND
VIN
C1, C2 (F) 0.05 0.10 0.47 1.00 3.30 5.00 10.00 22.00 100.00
FIGURE 4-1:
Inverting Voltage Doubler
4.2
Capacitor Selection
The output resistance of the TC682 is determined, in part, by the ESR of the capacitors used. An expression for ROUT is derived as shown below:
ROUT = 2(RSW1 + RSW2 + ESRC1 + RSW3 + RSW4 + ESRC2) +2(RSW1 + RSW2 + ESRC1 + RSW3 + RSW4 + ESRC2) +1/(fPUMP x C1) +1/(fPUMP x C2) +ESRC3
TABLE 4-2:
C3 (F) 0.50 1.00 3.30 5.00 10.00 22.00 100.00
VRIPPLE PEAK-TO-PEAK VS. C3 (IOUT 10mA)
VRIPPLE (mV) 1020 520 172 120 70 43 25
Assuming all switch resistances are approximately equal:
ROUT = 16RSW + 4ESRC1 + 4ESRC2 + ESRC3 +1/(fPUMP x C1) +1/(fPUMP x C2)
ROUT is typically 140 at +25C with VIN = +5V and 3.3 F low ESR capacitors. The fixed term (16RSW) is about 80-90. It can be seen easily that increasing or decreasing values of C1 and C2 will affect efficiency by changing ROUT. However, be careful about ESR. This term can quickly become dominant with large electrolytic capacitors. Table 4-1 shows ROUT for various values of C1 and C2 (assume 0.5 ESR). C1 must be rated at 6VDC or greater while C2 and C3 must be rated at 12VDC or greater.
(c) 2006 Microchip Technology Inc.
DS21453C-page 5
TC682
4.3 Paralleling Devices 4.4
Paralleling multiple TC682s reduces the output resistance of the converter. The effective output resistance is the output resistance of a single device divided by the number of devices. As illustrated in Figure , each requires separate pump capacitors C1 and C2, but all can share a single reservoir capacitor.
-5V Regulated Supply From A Single 3V Battery
Figure 4-3 shows a -5V power supply using one 3V battery. The TC682 provides -6V at VOUT, which is regulated to -5V by the negative LDO. The input to the TC682 can vary from 3V to 5.5V without affecting regulation appreciably. A TC54 device is connected to the battery to detect undervoltage. This unit is set to detect at 2.7V. With higher input voltage, more current can be drawn from the outputs of the TC682. With 5V at VIN, 10 mA can be drawn from the regulated output. Assuming 150 source resistance for the converter, with IL-= 10 mA, the charge pump will droop 1.5V.
VIN
+ 10 F -
C1+ C1-
VIN 10 F
+ -
C1+ C1 -
VIN
TC682
+ 10 F - C2+ V-OUT C2- GND + 10 F - C2 + C2 -
TC682
V-OUT GND Negative Supply - + C-OUT 22 F
GND
FIGURE 4-2:
Paralleling TC682 for Lower Output Source Resistance
+ 10 F - + - 3V + 10 F -
C1+ C1-
VIN
Ground C2+ C2- GND
TC682
VSS V-OUT - 22 F +C - OUT VIN VOUT
+ -
1 F -5 Supply
Negative LDO Regulator
TC54VC2702Exx VIN VSS VOUT LOW BATTERY
FIGURE 4-3:
Negative Supply Derived from 3V Battery
DS21453C-page 6
(c) 2006 Microchip Technology Inc.
TC682
5.0
Note:
TYPICAL CHARACTERISTICS
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Circuit of Figure 3-1, C1 = C2 = COUT = 3.3 F, TA = 25C unless otherwise noted.
Output Resistance vs. VIN
240 C1 - C3 = 3.3 F 220 200 180 160 140 120 1 2 3 VIN (V) 4 5 6
VOUT (V)
-7.5 -8.0 -8.5 -9.0 -9.5 -10.0 -10.5 0 5 10 15 LOAD CURRENT (mA) VIN = 5V
VOUT vs. Load Current
OUTPUT RESISTANCE ()
Supply Current vs. VIN
300
OUTPUT SOURCE RESISTANCE ()
Output Source Resistance vs. Temperature
200 180 160 140 120 100 80 -50 VIN = 5V IOUT = 10 mA
NO LOAD
SUPPLY CURRENT (A)
250
200
150
100
50 1 2 3 VIN (V) 4 5 6
0
50
100
TEMPERATURE (C)
Output Ripple vs. Output Current
200 VIN = 5V
OUTPUT RIPPLE (mV PK-PK)
150
C3 = 10 F
100
50
C3 = 100 F
0 0 5 10 OUTPUT CURRENT (mA) 15 20
(c) 2006 Microchip Technology Inc.
DS21453C-page 7
TC682
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
Package marking data not available at this time.
6.2
Taping Form
Component Taping Orientation for 8-Pin SOIC (Narrow) Devices
User Direction of Feed
Pin 1
W
P Standard Reel Component Orientation for 713 Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size
8-Pin SOIC (N)
12 mm
8 mm
2500
13 in
6.3
Package Dimensions
8-Pin Plastic DIP
Pin 1
.260 (6.60) .240 (6.10)
.045 (1.14) .030 (0.76) .400 (10.16) .348 (8.84) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92)
.070 (1.78) .040 (1.02)
.310 (7.87) .290 (7.37)
.040 (1.02) .020 (0.51)
.015 (0.38) .008 (0.20) .400 (10.16) .310 (7.87)
3 Min.
.110 (2.79) .090 (2.29)
.022 (0.56) .015 (0.38)
Dimensions: inches (mm)
DS21453C-page 8
(c) 2006 Microchip Technology Inc.
TC682
8-Pin SOIC
Pin 1
.157 (3.99) .150 (3.81)
.244 (6.20) .228 (5.79)
.050 (1.27) Typ.
.197 (5.00) .189 (4.80) .069 (1.75) .053 (1.35) .020 (0.51) .010 (0.25) .013 (0.33) .004 (0.10) .010 (0.25) .007 (0.18) .050 (1.27) .016 (0.40) Dimensions: inches (mm)
8 Max.
(c) 2006 Microchip Technology Inc.
DS21453C-page 9
TC682
NOTES:
DS21453C-page 10
(c) 2006 Microchip Technology Inc.
TC682
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(c) 2006 Microchip Technology Inc.
DS21453C-page 11
TC682
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: RE: Technical Publications Manager Reader Response Total Pages Sent ________
From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Device: TC682 Questions: 1. What are the best features of this document? Y N Literature Number: DS21453C FAX: (______) _________ - _________
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
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5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21453C-page 12
(c) 2006 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
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DS21453C-page 13
WORLDWIDE SALES AND SERVICE
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DS21453C-page 14
(c) 2006 Microchip Technology Inc.

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